Design, Control, and Application of Modular Multilevel Converters for HVDC Transmission Systems (Wiley – IEEE)

Preface xiii Acknowledgements xv About the Companion Website xvii Nomenclature xix Introduction 1 1 Introduction to Modular Multilevel Converters 7 1.1 Introduction 7 1.2 The Two-Level Voltage Source Converter 9 1.2.1 Topology and Basic Function 9 1.2.2 Steady-State Operation 12 1.3 Benefits of Multilevel Converters 15 1.4 Early Multilevel Converters 17 1.4.1 Diode Clamped Converters 17 1.4.2 Flying Capacitor Converters 20 1.5 Cascaded Multilevel Converters 23 1.5.1 Submodules and Submodule Strings 23 1.5.2 Modular Multilevel Converter with Half-Bridge Submodules 28 1.5.3 Other Cascaded Converter Topologies 43 1.6 Summary 57 2 Main-Circuit Design 60 2.1 Introduction 60 2.2 Properties and Design Choices of Power Semiconductor Devices for High-Power Applications 61 2.2.1 Historical Overview of the Development Toward Modern Power Semiconductors 61 2.2.2 Basic Conduction Properties of Power Semiconductor Devices 64 2.2.3 P-N Junctions for Blocking 65 2.2.4 Conduction Properties and the Need for Carrier Injection 67 2.2.5 Switching Properties 72 2.2.6 Packaging 73 2.2.7 Reliability of Power Semiconductor Devices 80 2.2.8 Silicon Carbide Power Devices 84 2.3 Medium-Voltage Capacitors for Submodules 92 2.3.1 Design and Fabrication 93 2.3.2 Self-Healing and Reliability 95 2.4 Arm Inductors 96 2.5 Submodule Configurations 98 2.5.1 Existing Half-Bridge Submodule Realizations 99 2.5.2 Clamped Single-Submodule 104 2.5.3 Clamped Double-Submodule 105 2.5.4 Unipolar-Voltage Full-Bridge Submodule 106 2.5.5 Five-Level Cross-Connected Submodule 107 2.5.6 Three-Level Cross-Connected Submodule 107 2.5.7 Double Submodule 108 2.5.8 Semi-Full-Bridge Submodule 109 2.5.9 Soft-Switching Submodules 110 2.6 Choice of Main-Circuit Parameters 112 2.6.1 Main Input Data 112 2.6.2 Choice of Power Semiconductor Devices 114 2.6.3 Choice of the Number of Submodules 115 2.6.4 Choice of Submodule Capacitance 117 2.6.5 Choice of Arm Inductance 117 2.7 Handling of Redundant and Faulty Submodules 118 2.7.1 Method 1 118 2.7.2 Method 2 119 2.7.3 Comparison of Method 1 and Method 2 120 2.7.4 Handling of Redundancy Using IGBT Stacks 121 2.8 Auxiliary Power Supplies for Submodules 121 2.8.1 Using the Submodule Capacitor as Power Source 121 2.8.2 Power Supplies with High-Voltage Inputs 123 2.8.3 The Tapped-Inductor Buck Converter 125 2.9 Start-Up Procedures 126 2.10 Summary 126 3 Dynamics and Control 133 3.1 Introduction 133 3.2 Fundamentals 134 3.2.1 Arms 135 3.2.2 Submodules 135 3.2.3 AC Bus 136 3.2.4 DC Bus 136 3.2.5 Currents 136 3.3 Converter Operating Principle and Averaged Dynamic Model 137 3.3.1 Dynamic Relations for the Currents 137 3.3.2 Selection of the Mean Sum Capacitor Voltages 137 3.3.3 Averaging Principle 138 3.3.4 Ideal Selection of the Insertion Indices 140 3.3.5 Sum-Capacitor-Voltage Ripples 141 3.3.6 Maximum Output Voltage 144 3.3.7 DC-Bus Dynamics 146 3.3.8 Time Delays 148 3.4 Per-Phase Output-Current Control 148 3.4.1 Tracking of a Sinusoidal Reference Using a PI Controller 149 3.4.2 Resonant Filters and Generalized Integrators 150 3.4.3 Tracking of a Sinusoidal Reference Using a PR Controller 152 3.4.4 Parameter Selection for a PR Current Controller 153 3.4.5 Output-Current Controller Design 157 3.5 Arm-Balancing (Internal) Control 161 3.5.1 Circulating-Current Control 163 3.5.2 Direct Voltage Control 163 3.5.3 Closed-Loop Voltage Control 166 3.5.4 Open-Loop Voltage Control 168 3.5.5 Hybrid Voltage Control 172 3.6 Three-Phase Systems 175 3.6.1 Balanced Three-Phase Systems 175 3.6.2 Imbalanced Three-Phase Systems 175 3.6.3 Instantaneous Active Power 176 3.6.4 Wye (Y) and Delta (Delta) Connections 177 3.6.5 Harmonics 177 3.6.6 Space Vectors 178 3.6.7 Instantaneous Power 182 3.6.8 Selection of the Space-Vector Scaling Constant 184 3.7 Vector Output-Current Control 184 3.7.1 PR (PI) Controller 186 3.7.2 Reference-Vector Saturation 188 3.7.3 Transformations 188 3.7.4 Zero-Sequence Injection 190 3.8 Higher-Level Control 192 3.8.1 Phase-Locked Loop 193 3.8.2 Open-Loop Active- and Reactive-Power Control 197 3.8.3 DC-Bus-Voltage Control 198 3.8.4 Power-Synchronization Control 200 3.9 Control Architectures 207 3.9.1 Communication Network 209 3.9.2 Fault-Tolerant Communication Networks 211 3.10 Summary 212 4 Control under Unbalanced Grid Conditions 214 4.1 Introduction 214 4.2 Grid Requirements 214 4.3 Shortcomings of Conventional Vector Control 215 4.3.1 PLL with Notch Filter 216 4.4 Positive/Negative-Sequence Extraction 219 4.4.1 DDSRF-PNSE 219 4.4.2 DSOGI-PNSE 221 4.5 Injection Reference Strategy 223 4.5.1 PSI with PSI-LVRT Compliance 225 4.5.2 MSI-LVRT Mixed Positive- and Negative-Sequence Injection with both PSI-LVRT and NSI-LVRT Compliance 226 4.6 Component-Based Vector Output-Current Control 226 4.6.1 DDSRF-PNSE-Based Control 226 4.6.2 DSOGI-PNSE-Based Control 227 4.7 Summary 228 5 Modulation and Submodule Energy Balancing 232 5.1 Introduction 232 5.2 Fundamentals of Pulse-Width Modulation 233 5.2.1 Basic Concepts 233 5.2.2 Performance of Modulation Methods 234 5.2.3 Reference Third-Harmonic Injection in Three-Phase Systems 235 5.3 Carrier-Based Modulation Methods 236 5.3.1 Two-Level Carrier-Based Modulation 236 5.3.2 Analysis by Fourier Series Expansion 237 5.3.3 Polyphase Systems 242 5.4 Multilevel Carrier-Based Modulation 243 5.4.1 Phase-Shifted Carriers 243 5.4.2 Level-Shifted Carriers 250 5.5 Nearest-Level Control 252 5.6 Submodule Energy Balancing Methods 256 5.6.1 Submodule Sorting 256 5.6.2 Predictive Sorting 259 5.6.3 Tolerance Band Methods 263 5.6.4 Individual Submodule-Capacitor-Voltage Control 269 5.7 Summary 270 6 Modeling and Simulation 272 6.1 Introduction 272 6.2 Leg-Level Averaged (LLA) Model 274 6.3 Arm-Level Averaged (ALA) Model 275 6.3.1 Arm-Level Averaged Model with Blocking Capability (ALA-BLK) 276 6.4 Submodule-Level Averaged (SLA) Model 278 6.4.1 Vectorized Simulation Models 279 6.5 Submodule-Level Switched (SLS) Model 280 6.5.1 Multiple Phase-Shifted Carrier (PSC) Simulation 281 6.6 Summary 281 7 Design and Optimization of MMC-HVDC Schemes for Offshore Wind-Power Plant Application 283 7.1 Introduction 283 7.2 The Influence of Regulatory Frameworks on the Development Strategies for Offshore HVDC Schemes 284 7.2.1 UK’s Regulatory Framework for Offshore Transmission Assets 285 7.2.2 Germany’s Regulatory Framework for Offshore Transmission Assets 286 7.3 Impact of Regulatory Frameworks on the Functional Requirements and Design of Offshore HVDC Terminals 286 7.4 Components of an Offshore MMC-HVDC Converter 287 7.4.1 Offshore HVDC Converter Transformer 289 7.4.2 Phase Reactors and DC Pole Reactors 290 7.4.3 Converter Valve Hall 292 7.4.4 Control and Protection Systems 293 7.4.5 AC and DC Switchyards 293 7.4.6 Auxiliary Systems 293 7.5 Offshore Platform Concepts 294 7.5.1 Accommodation Offshore 295 7.6 Onshore HVDC Converter 295 7.6.1 Onshore DC Choppers/Dynamic Brakers 296 7.6.2 Inrush Current Limiter Resistors 297 7.7 Recommended System Studies for the Development and Integration of an Offshore HVDC Link to a WPP 298 7.7.1 Conceptual and Feasibility Studies with Steady-State Load Flow 299 7.7.2 Short-Circuit Analysis 301 7.7.3 Dynamic System Performance Analysis 301 7.7.4 Transient Stability Analysis 301 7.7.5 Harmonic Analysis 302 7.7.6 Ferroresonance 302 7.8 Summary 303 8 MMC-HVDC Standards and Commissioning Procedures 305 8.1 Introduction 305 8.2 CIGRE and IEC Activities for the Standardization of MMC-HVDC Technology 306 8.2.1 Hierarchy of Available and Applicable Codes, Standards and Best Practice Recommendations for MMC-HVDC Projects 309 8.3 MMC-HVDC Commissioning and Factory and Site Acceptance Tests 309 8.3.1 Pre-Commissioning 311 8.3.2 Offsite Commissioning Tests or Factory Acceptance Tests 312 8.3.3 Onsite Testing and Site Acceptance Tests 313 8.3.4 Onsite Energizing Tests 314 8.4 Summary 317 9 Control and Protection of MMC-HVDC under AC and DC Network Fault Contingencies 318 9.1 Introduction 318 9.2 Two-Level VSC-HVDC Fault Characteristics under Unbalanced AC Network Contingency 319 9.2.1 Two-Level VSC-HVDC Fault Characteristics under DC Fault Contingency 321 9.3 MMC-HVDC Fault Characteristics under Unbalanced AC Network Contingency 322 9.3.1 Internal AC Bus Fault Conditions at the Secondary Side of the Converter Transformer 323 9.4 DC Pole-to-Ground Short-Circuit Fault Characteristics of the Half-Bridge MMC-HVDC 325 9.4.1 DC Pole-to-Pole Short-Circuit Fault Characteristics of the Half-Bridge MMC-HVDC 325 9.5 MMC-HVDC Component Failures 327 9.5.1 Submodule Semiconductor Failures 327 9.5.2 Submodule Capacitor Failure 328 9.5.3 Phase Reactor Failure 329 9.5.4 Converter Transformer Failure 329 9.6 MMC-HVDC Protection Systems 329 9.6.1 AC-Side Protections 331 9.6.2 DC-Side Protections 331 9.6.3 DC-Bus Undervoltage, Overvoltage Protection 331 9.6.4 DC-Bus Voltage Unbalance Protection 332 9.6.5 DC-Bus Overcurrent Protection 332 9.6.6 DC Bus Differential Protection 332 9.6.7 Valve and Submodule Protection 332 9.6.8 Transformer Protection 333 9.6.9 Primary Converter AC Breaker Failure Protection 333 9.7 Summary 333 10 MMC-HVDC Transmission Technology and MTDC Networks 336 10.1 Introduction 336 10.2 LCC-HVDC Transmission Technology 336 10.3 Two-Level VSC-HVDC Transmission Technology 338 10.3.1 Comparison of VSC-HVDC vs. LCC-HVDC Technology 338 10.4 Modular Multilevel HVDC Transmission Technology 339 10.4.1 Monopolar Asymmetric MMC-HVDC Scheme Configuration 340 10.4.2 Symmetrical Monopole MMC-HVDC Scheme Configuration 340 10.4.3 Bipolar HVDC Scheme Configuration 341 10.4.4 Homopolar HVDC Scheme Configuration 342 10.4.5 Back-to-Back HVDC Scheme Configuration 342 10.5 The European HVDC Projects and MTDC Network Perspectives 343 10.5.1 The North Sea Countries Offshore Grid Initiative (NSCOGI) 343 10.5.2 Large Integration of Offshore Wind Farms and Creation of the Offshore DC Grid 344 10.6 Multi-Terminal HVDC Configurations 345 10.6.1 Series-Connected MTDC Network 346 10.6.2 Parallel-Connected MTDC Network 346 10.6.3 Meshed MTDC Networks 347 10.7 DC Load Flow Control in MTDC Networks 348 10.8 DC Grid Control Strategies 349 10.8.1 Dynamic Voltage Control and Power Balancing in MTDC Networks 350 10.8.2 Power and Voltage Droop Control Strategy 351 10.8.3 Voltage Margin Control Method 352 10.8.4 Dead-Band Droop Control 352 10.8.5 Centralized and Distributed Voltage Control Strategies 354 10.9 DC Fault Detection and Protection in MTDC Networks 355 10.10 Fault-Detection Methods in MTDC 357 10.10.1 Overcurrent and Voltage Detection Methods 357 10.10.2 Distance Relay Protection 359 10.10.3 Differential Line Protection 359 10.10.4 Voltage Derivative Detection 359 10.10.5 Traveling Wave Based Detection 360 10.10.6 Frequency Domain Based Detection 361 10.10.7 Wavelet Based Fault Detection 361 10.11 DC Circuit Breaker Technologies 362 10.11.1 DC Circuit Breaker with MOVs in Series with the DC Line 364 10.11.2 DC Breakers with MOVs in Parallel with the DC Line 366 10.12 Fault-Current Limiters 367 10.12.1 Fault Current Limiting Reactors 367 10.12.2 Solid-State Fault-Current Limiters 368 10.12.3 Superconducting Fault-Current Limiters 369 10.13 The Influence of Grounding Strategy on Fault Currents 369 10.14 DC Supergrids of the Future 370 10.15 Summary 371 Index 373