Regular Nanofabrics in Emerging Technologies: Design and Fabrication Methods for Nanoscale Digital Circuits (Lecture Notes in Electrical Engineering)
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Regular Nanofabrics in Emerging Technologies: Design and Fabrication Methods for Nanoscale Digital Circuits (Lecture Notes in Electrical Engineering), Sabino Matarrese, 9789400735705
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Regular Nanofabrics in Emerging Technologies gives a deep insight into both fabrication and design aspects of emerging semiconductor technologies, that represent potential candidates for the post-CMOS era. Its approach is unique, across different fields, and it offers a synergetic view for a public of different communities ranging from technologists, to circuit designers, and computer scientists. The book presents two technologies as potential candidates for future semiconductor devices and systems and it shows how fabrication issues can be addressed at the design level and vice versa. The reader either for academic or research purposes will find novel material that is explained carefully for both experts and non-initiated readers. Regular Nanofabrics in Emerging Technologies is a survey of post-CMOS technologies. It explains processing, circuit and system level design for people with various backgrounds. Haykel Ben Jamaa is a research engineer at the “Commissariat l’Energie Atomique et aux Energies Alternatives (CEA-Lti)”. He obtained his PhD degree in Electrical Engineering in September 2009 from the “Ecole Polytechnique Fdrale de Lausanne” (EPFL), Switzerland. He received his co-joint MSc degree in Electrical Engineering from the “Technische Universitt Mnchen”, Germany, and the “Ecole Centrale Paris”, France, in 2004. He is currently working in the field of nanotechnology with an interdisciplinary approach linking post-CMOS technologies to specific architectures. His research interests include the fabrication techniques for emerging and post-CMOS technologies and non-conventional and fault-tolerant design methodologies and styles for nanometer scale circuits, with a particular emphasis on novel fabrication and design technologies of silicon nanowire crossbar arrays. His expertise consists in linking device fabrication and circuit design; it covers cleanroom processing, device modelling and test, and fault-tolerant circuit design. Previously, he was a visiting researcher at Stanford University, California, USA, a research fellow with the Max-Planck Institute for Solid-State Research in Stuttgart, Germany, and a mixed-signal designer with Infineon Technologies, Munich, Germany. He has been involved in the review process of prestigious conferences and journals (IEEE/ACM Design Automation and Test in Europe Conference – DATE, IEEE Transactions on Computer-Aided Design – TCAD, ACM Journal on Emerging Technologies in Computing Systems – JETC) and he was a TPC member of DATE in 2008, Nano-Net in 2009, NOCS in 2010 and VLSI-SoC in 2010. He obtained the ACM Outstanding Dissertation Award in EDA (2009). Haykel Ben Jamaa also has a MA degree in Finances and Strategy from the “Institut d’Etudes Politiques de Paris”, France. He was the president of EPFL’s researchers and lecturers association in 2007-2009. He was an elected member of EPFL’s School Assembly in 2007-2008. He was also an active member of other communities, such as the PhD Board of EPFL and the humanitarian mission MHIGE. Acknowledgments. Contents. List of Figures. List of Tables. 1 Introduction. 1.1 The Linear Scaling. 1.2 The Latest Milestones. 1.3 Emerging technologies. 1.4 Regular Architectures and Fabrics. 1.5 Challenges of Regular Emerging Architectures. 1.6 Organization of the Book. References. 2 Fabrication of Nanowire Crossbars. 2.1 Nanowire Fabrication Techniques. 2.2 Crossbar Technologies. 2.3 Fabrication Facilities at EPFL. 2.4 Process Flow. 2.5 Process Optimization. 2.6 Device Characterization. 2.7 Potential Applications. 2.8 Discussions. 2.9 Chapter Contributions and Summary. References. 3 Decoder Logic Design. 3.1 Crossbar Architecture. 3.2 Decoder and Encoding Types. 3.3 Multi-Valued Logic Encoding. 3.4 The MSPT Decoder. 3.5 Discussions. 3.6 Chapter Contributions and Summary. References. 4 Decoder Test. 4.1 Necessity of Testing Crossbar Circuits. 4.2 Testing Crossbar Circuits. 4.3 Perturbative Current Model. 4.4 Stochastic Current Model. 4.5 Model Implementation. 4.6 Simulation Results. 4.7 Discussions. 4.8 Chapter Contributions and Summary. References. 5 Logic Design with Ambipolar Devices. 5.1 Logic Circuits with Carbon Nanotubes. 5.2 Ambipolar CNTFETs. 5.3 Dynamic Logic with Ambipolar CNTFETs. 5.4 Static Logic with Ambipolar CNTFETs. 5.5 Multi-Level Logic Synthesis with Static CNTFET Gates. 5.6 Design of Regular Fabrics. 5.7 Discussions. 5.8 Chapter Contributions and Summary. References. 6 Conclusions and Future Work. 6.1 Book Summary and Contributions. 6.2 Future Work. List of Acronyms. List of Symbols.
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